
DATASHEET
LOW EMI CLOCK GENERATOR
ICS181-53
IDT / ICS LOW EMI CLOCK GENERATOR
1
ICS181-53
REV C 051310
Description
The ICS181-53 generates a low EMI output clock from
a clock or crystal input. The device uses IDT’s
proprietary mix of analog and digital Phase Locked
Loop (PLL) technology to spread the frequency
spectrum of the output, thereby reducing the frequency
amplitude peaks by several dB.
The ICS181-53 offers center spread selection of
+/-0.625% and +/-1.875%. Refer to the MK1714-01/02
for the widest selection of input frequencies and
multipliers.
IDT offers a complete line of EMI reducing clock
generators. Consult us when you need to remove
crystals and oscillators from your board.
Features
Pin and function compatible to Cypress W181-53
Packaged in 8-pin SOIC
Provides a spread spectrum output clock
Accepts a clock input and provides same frequency
dithered output
Input frequency of 46 to 75 MHz for Clock input
Peak reduction by 7dB - 14dB typical on 3rd - 19th
odd harmonics
Spread percentage selection for +/-0.625% and
+/-1.875%
Operating voltage of 3.3 V and 5 V
Advanced, low-power CMOS process
Block Diagram
PLL Clock
Synthesis
and Spread
Spectrum
Circuitry
SS%
CLK
GND
VDD
SSON#
CLKIN
Clock Buffer
FS1